1. Field of the Invention
The present invention relates generally to the field of digital communications, and particular to communications interface circuitry.
2. Related Art
Various communication interface standards have been created for establishing a common communications scheme between computers and peripheral devices. For example, RS-232 serial communication interface standard has been widely used in many applications, including personal computers. Moreover, RS-485 serial communication interface standard has provided a more robust connection to support higher communication speeds and longer cables.
Normally, these and other serial communication interface standards were created for and relied upon power supply voltages of approximately five volts (5V). However, over the past few years, many electronic devices have been designed to utilize lower power supply voltages. As one illustrative example, portable computers have been manufactured with internal power supplies providing approximately 3V.
As a result, traditional output stages have been unable to drive various types of serial communication links (e.g., RS-232 and RS-485 communications) at these lower power supply voltages. The reason is that devices, connected to the serial communication link and operating at higher supply voltages, occasionally require an output to be driven above and/or below the power supply rails. Thus, it has been necessary to implement a high swing interface output stage which would allow the output of an electronic device to be appropriately driven.
Referring now to FIG. 1 and described in U.S. Pat. No. 5,414,314 assigned to the Assignee of the present application, an integrated Complementary Metal-Oxide-Semiconductor (CMOS) high swing interface output stage 100 is shown. The interface output stage 100 utilizes three P-channel devices P10, P11 and P15 and three N-channel devices N12, N13 and N14. Two of the three P-channel devices P10 and P11 are connected in series between a positive power supply terminal 110 and an output of the interface 120 while N-channel devices N12 and N13 are connected in series between the output of the interface 120 and a negative power supply terminal 130.
As described, this conventional high swing interface output stage 100 poses a number of disadvantages. One disadvantage is that this output stage 100 utilizes two output transistor pairs (P10,P11) and (N12,N13) in series. These transistors collectively occupy a substantial percentage of die area, and more than one-half of the die size in some cases. Hence, it would be desirable to replace each series of output transistor pairs with a single output transistor in order to save die area.